Forward Error Correction (FEC) codes are commonly used in a wide variety of communication systems. For example, such codes can be used in optical communication systems to provide significant power gains within the overall optical power budget of an optical communication link. At the same time, FEC codes lower the Bit Error Rate (BER) of the optical communication link. The resulting gain obtained through the use of the FEC technique can be exploited for either increasing the repeater distances, thereby relaxing optical components and line fiber specifications, or improving the overall quality of communication. For optical communication systems, a high rate error correction code is desirable, as long as the code has large coding gain and can correct both random and burst errors.
One particularly important FEC code is a Reed-Solomon (RS) code. RS codes are maximum distance separable codes, which means that code vectors are maximally separated in a multi-dimensional space. The maximum distance separable property and symbol-level encoding and decoding of RS code make it an excellent candidate for correcting both random and burst errors. In fact, an eight-byte error correcting RS code is recommended as a strong FEC solution for some optical submarine systems. This is due to not only the good random and burst error correcting capability of this code, but also the availability of relatively low complexity encoding and decoding algorithms.
In fact, the Standardization Sector of the International Telecommunication Union, commonly abbreviated as ITU-T, has adopted a RS(255,239) code. This RS(255,239) code means that 255 total symbols are transmitted, of which 239 symbols are information symbols and 16 (i.e., 255-239) are redundancy symbols that contain information that enables error correction. A frame format 100 for this RS code is shown in FIG. 1. Frame format 100 comprises 16 rows and 255 columns. Each entry of a row or column is one symbol, which is a byte in the ITU-T standard. Each row has one codeword of 255 symbols, divided into one byte of protocol overhead 110, 238 bytes of payload 120, and 16 bytes of redundancy bytes 130.
When frame format 100 is transmitted, it is transmitted in a particular order. This order is shown in transmission format 170. Basically, each column of frame format 100 is transmitted beginning with the first row of the first column (i.e., byte 140) and ending with the last row of the last column (i.e., byte 160). Consequently, byte 140 is transmitted in the first position, byte 145 is transmitted in position 16, byte 150 is transmitted in position 3,825, and byte 160, the final byte, is transmitted in position 4080. This transmission scheme is chosen mainly to reduce burst errors, as these types of errors would be spread over several codewords.
A receiver would receive transmission format 170 as byte 140 through byte 160, with byte 140 arriving first and byte 160 arriving last. The receiver has to reassemble codewords (i.e., codewords 1 through 16 of frame format 100) from frame format 100 in order to be able to correct errors in each codeword.
Although the ITU-T details the frame format 100 and the transmission format 170, the actual implementation of decoders and encoders to receive and transmit, respectively, information using the formats are not specified and remain design choices. For instance, a single encoder could be used to create the codewords in rows 1 through 16. Alternatively, 16 encoders could be used to create the codewords in rows 1 through 16. Although using 16 encoders increases the speed of encoding, this many encoders also increases complexity, power, and cost.
Components for encoding and decoding RS codes are readily available for throughput rates below one Gigabits per second (Gb/s). However, as the data rate increases to 10 Gb/s and beyond, increases in power consumption and complexity of these FEC devices are the main barriers to integrating them into optical communication systems at relatively low cost. Consequently, a problem with implementing a transmission scheme, such as that shown in FIG. 1, involving FEC codes is meeting the required power, complexity, and speed at an appropriate cost.
A need therefore exists for techniques that allow high speed FEC and yet offer relatively low power, complexity, and cost.